Current processing methods for transistors, e.g., field effect transistors (FETs), metal oxide semiconductor devices (MOS), and complimentary MOS devices (CMOS), uses ion implantation in the channel region to control the threshold voltage of the device. The channel region becomes conductive when an appropriate gate to source voltage difference is applied to cause a conductive channel to form between the source and the drain. By controlling the channel dopant concentration, the threshold voltage may be controlled to achieve high performance transistors.
Conventionally, a blanket doping of the substrate with the intended channel implant is performed prior to gate formation. The gate oxide and gate are then formed followed by the source/drain regions. The implants are then activated with an annealing step. During the annealing step, transient enhanced diffusion occurs, causing the channel dopants (and the source/drain implants) to be redistributed in an uncontrolled fashion. Consequently, the channel dopant concentration is difficult to control using conventional methods.
Thus, there is a need for a method of forming well localized channel regions that is not redistributed by subsequent processing steps.